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Job · Santa Clara, CA · Full time

Senior Technical Lead - CPU Physical Design

Intel Retiree Medical Plan Trust · $67.5M budget · Since 1996

Why Intel Retiree Medical Plan Trust

FY2024 · Form 990Its mission and biggest programs, as filed

Provides health coverage for retired US employees and their dependents.

  • Provide Medical benefits for eligible retired employees of Intel corporation and their dependents$53.5M spent in FY2024

Before you apply

FY2024 · Form 990Independent: from IRS data, not the org
Budget
$53.5M
spent in FY2024
Fine: from the org's Form 990.
Pt I · Ln 18
Spent on programs
100%
of spending
Looks good: 100% of spending went to programs; 75% or more.
Pt IX · Ln 25 · col B
Surplus or deficit
+21%
of revenue, FY2024
Looks good: revenue was at least expenses in the latest filing.
Pt I · Ln 19
Cash reserves
112 mo
of spending, in cash and securities
Looks good: 111.7 months of spending in cash; 3 or more.
Pt X · Ln 1–2 · Pt I · Ln 18
Latest return
FY2024
latest Form 990
Looks good: the latest return is for FY2024, 2 tax years back; within 2 tax years.
IRS e-file
IRS status
501(c)(9)
tax-exempt since 1998
Looks good: listed by the IRS.
IRS BMF
Looks goodFineWorth a lookConcernTap a box for the reason.

About the role

The org's own posting, as written

Job Details:

Job Description

We are seeking a highly experienced and motivated Senior Technical Lead - CPU Physical Design to lead the physical implementation of next-generation CPU IPs from floorplanning through signoff. The successful candidate will provide technical leadership across the physical design lifecycle, driving PPA optimization, execution excellence, methodology adoption, and design convergence for high-performance CPU products. The ideal candidate brings deep expertise in advanced-node physical design, strong technical leadership, and a proven track record of delivering complex CPU, SoC, or high-performance IP designs.

Key Responsibilities

Lead physical design execution for CPU IPs from design planning through signoff. Provide technical leadership for: Floorplanning and Design Planning Placement and Optimization Clock Tree Synthesis Routing and Physical Verification Timing Closure Power and Area Optimization Signoff Readiness Drive PPA convergence and deliver aggressive frequency, power, and area targets. Define and execute physical design strategies for advanced CPU architectures and technology nodes. Partner closely with Architecture, RTL, Circuit Design, DFT, CAD, Power, and Signoff teams to drive implementation success. Lead resolution of complex implementation, timing, congestion, and power challenges.

Drive methodology improvements and adoption of best practices across multiple projects. Evaluate implementation tradeoffs and provide technical recommendations that influence architecture and design decisions. Mentor and guide engineers across the physical design organization. Collaborate with CAD teams to improve efficiency through automation, methodology enhancements, and AI-driven workflows. Support planning, estimation, risk assessment, and execution tracking for physical design deliverables. Contribute to hiring, technical interviews, and development of engineering talent.

Qualifications

Minimum Qualifications M.Tech/MS/PhD in Electrical Engineering, Computer Engineering, VLSI, or a related discipline. 14+ years of industry experience in ASIC or CPU Physical Design. Proven experience delivering successful products through complete physical implementation and signoff cycles.

Strong expertise in: Floorplanning and Design Planning Placement and Optimization Clock Tree Synthesis Routing and Closure Static Timing Analysis Signal Integrity Power Integrity and EM/IR Physical Verification Hands-on experience with industry-standard implementation tools such as: Synopsys Fusion Compiler ICC2 Cadence Innovus PrimeTime StarRC RedHawk Calibre Strong scripting and automation experience using: Python Tcl Shell Preferred Qualifications Experience delivering high-performance CPU core, cache, fabric, or compute IP designs. Experience with advanced process technologies such as Intel 18A/14A, TSMC N3/N2, or equivalent.

Deep understanding of: Physical design methodologies Advanced timing closure techniques Hierarchical implementation…

Read the full posting

About Intel Retiree Medical Plan Trust

From its Form 990