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Job · Sharonville, OH · Full time

Sr. CPLD Engineer

American Conference of Governmental Industrial Hygienists · Science & Technology · $2.8M budget · 14 staff

Why American Conference of Governmental Industrial Hygienists

FY2024 · Form 990Its mission and biggest programs, as filed

Advances occupational and environmental health through scientific research and education.

  • Publications: the American Conference of Governmental Industrial Hygienists (acgih) publishes authoritative scientific information to advance occupational and environmental health. Acgih's publications include threshold limit values (tlvs(r)) and biological exposure indices (beis(r)), which are widely respected guidelines used by professionals worldwide…$535K spent in FY2024
  • Educations: acgih provides educational programs and resources to advance the knowledge and skills of occupational and environmental health professionals. These efforts include organizing webinars, workshops, and conferences that cover current research, regulatory developments, and best practices in Industrial hygiene and…$446K spent in FY2024
  • Member services: acgih provides a range of member services designed to support and engage professionals in the fields of Industrial hygiene, occupational and environmental health, and safety. Member benefits include access to exclusive publications, scientific guidelines such as tlvs(r) and…$188K spent in FY2024

Before you apply

FY2024 · Form 990Independent: from IRS data, not the org
Pays its leaders
$135K
1 officer reported
Fine: from the org's Form 990.
Pt VII · Sec A
Budget
$2.5M
spent in FY2024
Fine: from the org's Form 990.
Pt I · Ln 18
Staff
14
employees
100 volunteers
Fine: from the org's Form 990.
Pt I · Ln 5–6
Spent on programs
51%
of spending
Worth a look: 51% of spending went to programs; under 65%.
Pt IX · Ln 25 · col B
Surplus or deficit
+12%
of revenue, FY2024
Looks good: revenue was at least expenses in the latest filing.
Pt I · Ln 19
Cash reserves
<1 mo
of spending, in cash and securities
Concern: 0.1 months of spending in cash; under 2 weeks.
Pt X · Ln 1–2 · Pt I · Ln 18
Latest return
FY2024
latest Form 990
Looks good: the latest return is for FY2024, 2 tax years back; within 2 tax years.
IRS e-file
IRS status
501(c)(3)
tax-exempt since 2016
Looks good: listed by the IRS.
IRS BMF
Looks goodFineWorth a lookConcernTap a box for the reason.

About the role

The org's own posting, as written

At Jabil (NYSE: JBL), we are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, supply chain, and manufacturing solutions. With 60 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe.

Job summary

Under the guidance of management, develop new engineering designs of basic to moderate complexity. Gather design requirements and recommend implementation steps for basic to moderate reference designs, including modifications to existing products. Perform and analyze circuit designs of basic to moderate complexity, escalating more complex issues to management or senior team members. Develop subsystem architecture under the direction of a Lead Engineer or above.

Essential duties

AND RESPONSIBILITIES Work closely with Hardware, BIOS, BMC, and Firmware teams for CPLD / FPGA design, validation, and maintenance. Develop Server / Storage production power on sequence control logic by CPLD / FPGA. Implement new technology and design concept in CPLD / FPGA . Design test plan, development specifications, and issue tracking. JOB QUALIFICATIONS KNOWLEDGE REQUIREMENTS TECHNICAL KNOWLEDGE & SKILLS 5+ years of working experience in CPLD / FPGA development. Familiar with CPLD / FPGA design and Verilog/VHDL coding. Experience in I2C, SPI, UART, and SGPIO protocols. Experience in RTL coding and simulation.

Building in CPLDs and FPGAs, including coding practice, RTL coding standards, using Git, building test benches, etc. Familiar with System Verilog, Git, server product, and UVM is a plus. NON-TECHNICAL KNOWLEDGE & SKILLS Influence others and share best practices. Effectively communicate with a good understanding of English. Work as part of a global team. EDUCATION & EXPERIENCE REQUIREMENTS Electrical Engineering Degree (BSEE/MSEE or equivalent experience) 5+ years of experience in CPLD / FPGA design or another key competency. Or an equivalent combination of education, training, or experience.

Domestic and international travel is required (within 1 month) BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail.

If you believe you are a victim of identity theft, contact your local police department. Any scam job…

Read the full posting

About American Conference of Governmental Industrial Hygienists

From its Form 990

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